Manufacturing method of selectively etched DMOS body pickup
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United States of America Patent
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Feb 13, 2018
Issued Date -
N/A
app pub date -
Nov 18, 2016
filing date -
Nov 18, 2016
priority date (Note) -
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status (Latency Note)
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Abstract
A method for fabricating a LDMOS device in a well region of a semiconductor substrate, including: forming a body region and a source layer in the well region through a window of a polysilicon layer above the well region, wherein the body region has a deeper junction depth than the source layer; forming spacers at side walls of the polysilicon layer; and etching through the source layer through a window shaped by the spacers, wherein the source layer under the spacers is protected from etching, and is defined as source regions of the LDMOS device.
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International Classification(s)
- 2016 Application Filing Year
- H01L Class
- 27971 Applications Filed
- 23507 Patents Issued To-Date
- 84.05 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 1 Citation Count
- H01L Class
- 23.71 % this patent is cited more than
- 7 Age
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