Systems, methods and storage media for clock tree power estimation at register transfer level
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United States of America Patent
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Feb 13, 2018
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N/A
app pub date -
Oct 29, 2015
filing date -
Oct 29, 2014
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Abstract
Systems, methods and storage media are provided for clock tree power estimation at register transfer level. For example, a physical power model is generated based at least in part on a reference post-layout design. A clock tree is modeled at register transfer level based at least in part on the physical power model. Power estimation is performed for the modeled clock tree at the register transfer level.
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