Backward compatibility testing of software in a mode that disrupts timing

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United States of America Patent

PATENT NO 9892024
SERIAL NO

14930408

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Abstract

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A device may be run in a timing testing mode in which the device is configured to disrupt timing of processing that takes place on the one or more processors while running an application with the one or more processors. The application may be tested for errors while the device is running in the timing testing mode.

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Patent Owner(s)

Patent OwnerAddress
SONY INTERACTIVE ENTERTAINMENT LLC2207 BRIDGEPOINTE PARKWAY SAN MATEO CA 94404

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cerny, Mark Evan Los Angeles, US 60 1145
Simpson, David Los Angeles, US 107 1245

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