Propagation of updates to per-core-instantiated architecturally-visible storage resource
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United States of America Patent
Stats
-
Feb 13, 2018
Issued Date -
N/A
app pub date -
Aug 9, 2016
filing date -
Aug 28, 2013
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A microprocessor a plurality of processing cores, wherein each of the plurality of processing cores instantiates a respective architecturally-visible storage resource. A first core of the plurality of processing cores is configured to encounter an architectural instruction that instructs the first core to update the respective architecturally-visible storage resource of the first core with a value specified by the architectural instruction. The first core is further configured to, in response to encountering the architectural instruction, provide the value to each of the other of the plurality of processing cores and update the respective architecturally-visible storage resource of the first core with the value. Each core of the plurality of processing cores other than the first core is configured to update the respective architecturally-visible storage resource of the core with the value provided by the first core without encountering the architectural instruction.
First Claim
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International Classification(s)
- 2016 Application Filing Year
- H04L Class
- 37326 Applications Filed
- 27972 Patents Issued To-Date
- 74.94 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 0 Citation Count
- H04L Class
- 0 % this patent is cited more than
- 7 Age
Maintenance Fees
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|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Aug 13, 2025 |
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