Frequency offset correction precision of real-time clocks
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United States of America Patent
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Feb 6, 2018
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N/A
app pub date -
Sep 10, 2016
filing date -
Sep 10, 2016
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Abstract
In described examples, an apparatus includes: a counter configured to receive a reference clock signal and having a next state input and a current state output; a multiplexer coupled to the next state input of the counter, configured to output one of an incremented next state value and a corrected next state count value responsive to a count correction select control signal; a seconds reference circuit coupled to the current state output of the counter, configured to output a seconds reference signal; an incrementer coupled to the current state output of the counter, configured to output the incremented next state value; and a calibration compensation circuit coupled to a compensate up down input signal and to the current state output of the counter, configured to output the corrected next state count value and the count correction select control signal.
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