Semiconductor layered structure, method for producing semiconductor layered structure, and method for producing semiconductor device

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United States of America Patent

PATENT NO 9887310
SERIAL NO

15114001

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Abstract

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A semiconductor layered structure includes a substrate formed of a III-V compound semiconductor, a buffer layer disposed on and in contact with the substrate and formed of a III-V compound semiconductor, and a quantum well layer disposed on and in contact with the buffer layer and including a plurality of component layers formed of III-V compound semiconductors. The substrate has a diameter of 55 mm or more. At least one of the component layers is formed of a mixed crystal of three or more elements. When the compound semiconductor forming the substrate has a lattice constant d1, the compound semiconductor forming the buffer layer has a lattice constant d2, and the compound semiconductors forming the quantum well layer have an average lattice constant d3, (d2−d1)/d1 is −3×10−3 or more and 3×10−3 or less, and (d3−d1)/d1 is −3×10−3 or more and 3×10−3 or less.

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Patent Owner(s)

Patent OwnerAddress
SUMITOMO ELECTRIC INDUSTRIES LTDOSAKA-SHI OSAKA 541

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Akita, Katsushi Itami, JP 111 2665
Fujii, Kei Itami, JP 35 150
Kyono, Takashi Itami, JP 110 2719
Nishizuka, Koji Itami, JP 9 40
Shibata, Kaoru Itami, JP 23 139

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