Ultra-low drain-source resistance power MOSFET
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United States of America Patent
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Feb 6, 2018
Issued Date -
N/A
app pub date -
Feb 11, 2008
filing date -
Mar 21, 2006
priority date (Note) -
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Abstract
Ultra-low drain-source resistance power MOSFET. In accordance with an embodiment of the preset invention, a semiconductor device comprises a plurality of trench power MOSFETs. The plurality of trench power MOSFETs is formed in a second epitaxial layer. The second epitaxial layer is formed adjacent and contiguous to a first epitaxial layer. The first epitaxial layer is formed adjacent and contiguous to a substrate highly doped with red Phosphorus. The novel red Phosphorus doped substrate enables a desirable low drain-source resistance.
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Family

- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
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VISHAY-SILICONIX | SAN JOSE CA 95134 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Chau, The-Tu | San Jose, US | 10 | 119 |
# of filed Patents : 10 Total Citations : 119 | |||
Chen, Kuo-In | Los Altos, US | 33 | 636 |
# of filed Patents : 33 Total Citations : 636 | |||
Chen, Qufei | San Jose, US | 22 | 406 |
# of filed Patents : 22 Total Citations : 406 | |||
Hernandez, Martin | San Jose, US | 7 | 16 |
# of filed Patents : 7 Total Citations : 16 | |||
Pattanayak, Deva | Saratoga, US | 31 | 337 |
# of filed Patents : 31 Total Citations : 337 | |||
Shi, Sharon | San Jose, US | 19 | 364 |
# of filed Patents : 19 Total Citations : 364 | |||
Terrill, Kyle | Santa Clara, US | 71 | 884 |
# of filed Patents : 71 Total Citations : 884 |
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Mar 21, 2006 | PD | Priority Date |

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