Fan-out semiconductor package structure and fabricating method

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9887148
SERIAL NO

15437444

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Abstract

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A fan-out semiconductor package includes a layer of adhesive covering a temporary carrier, a first redistribution layer disposed on the layer of adhesive, the first redistribution layer including a first metal layer having recessed areas. Metal pillars are plated to a first group of the recessed areas in the first metal layer. A semiconductor chip next is bonded to a second group of the recessed areas and a molding compound covers the semiconductor chip. The molding compound is then ground to expose tops of the metal pillars. A second redistribution layer including a second passivation layer adhering to the molding compound and a second metal layer covering openings exposing the tops of the metal pillars are then added.

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Patent Owner(s)

Patent OwnerAddress
POWERTECH TECHNOLOGY INCNO 10 DATONG RD HSINCHU INDUSTRIAL PARK HUKOU TOWNSHIP HSINCHU COUNTY

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Ching-Yang Hsinchu County, TW 5 25
Huang, Jen-I Hsinchu County, TW 5 16

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