Nonvolatile memory system with erase suspend circuit and method for erase suspend management
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Feb 6, 2018
Issued Date -
N/A
app pub date -
Dec 6, 2016
filing date -
Dec 11, 2015
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A nonvolatile memory controller and a method for erase suspend management are disclosed. The nonvolatile memory controller includes an erase suspend circuit configured for determining a pre-suspend time each time that an erase operation of the nonvolatile memory device is suspended and for determining whether an erase-suspend limit has been reached using the determined pre-suspend time. The erase suspend circuit is further configured for preventing subsequent suspends of the erase operation when the erase-suspend limit has been reached.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully