Mechanism for copying data in memory

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United States of America Patent

PATENT NO 9886212
SERIAL NO

14169886

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Abstract

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An improved mechanism for copying data in memory is described which uses aliasing. In an embodiment, data is accessed from a first location in a memory and stored in a cache line associated with a second, different location in the memory. In response to a subsequent request for data from the second location in the memory, the cache returns the data stored in the cache line associated with the second location in the memory. The method may be implemented using additional hardware logic in the cache which is arranged to receive an aliasing request from a processor which identifies both the first and second locations in memory and triggers the accessing of data from the first location for storing in a cache line associated with the second location.

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Patent Owner(s)

Patent OwnerAddress
MIPS TECH LLC780 MONTAGUE EXPRESSWAY STE 308 SAN JOSE CA 95131

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jackson, Hugh St. Albans, GB 31 287
Meredith, Jason Hemel Hempstead, GB 16 241

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