Apparatus and method for integrated circuit forensics
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United States of America Patent
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Feb 6, 2018
Issued Date -
N/A
app pub date -
Jan 15, 2016
filing date -
Jun 24, 2013
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A test system including an embodiment having a sensor array adapted to test one or more devices under test in learning modes as well as evaluation modes. An exemplary test system can collect a variety of test data as a part of a machine learning system associated with known-good samples. Data collected by the machine learning system can be used to calculate probabilities that devices under test in an evaluation mode meet a condition of interest based on multiple testing and sensor modalities. Learning phases or modes can be switched on before, during, or after evaluation mode sequencing to improve or adjust machine learning system capabilities to determine probabilities associated with different types of conditions of interest. Multiple permutations of probabilities can collectively be used to determine an overall probability of a condition of interest which has a variety of attributes.
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