Multi-rate transceiver circuitry
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United States of America Patent
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Jan 30, 2018
Issued Date -
N/A
app pub date -
Feb 18, 2016
filing date -
Apr 4, 2014
priority date (Note) -
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status (Latency Note)
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Abstract
Techniques to operate circuitry in an integrated circuit are provided. The circuitry may include a receiver circuit and one of the provided techniques includes receiving a data stream at the receiver circuit. The receiver circuit may include a detector circuit that is used to determine the data rate of the received data stream. A controller block in the receiver circuit may accordingly configure a deserializer circuit in the receiver circuit based on the data rate of the received data stream. The circuitry may further include a transmitter circuit for transmitting data streams. The transmitter circuit may be configured during runtime based on the data rate of a data stream that is being transmitted. In some instances, irrespective of the data rate of the data stream being transmitted, a constant reference clock may be used in the transmitter circuit.
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