Analog-to-digital converter with offset calibration
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United States of America Patent
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Jan 30, 2018
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app pub date -
Oct 14, 2016
filing date -
Oct 14, 2016
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Abstract
An analog-to-digital converter (ADC) circuit including error correction circuitry for correcting offset drifts in an ADC, such as a successive approximation register (SAR) ADC. The offset drifts can be reduced, such as by sampling the offset following an analog-to-digital conversion and subsequently providing an error correction signal based on the sampled offset.
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