Strained CMOS on strain relaxation buffer substrate
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United States of America Patent
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Jan 30, 2018
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N/A
app pub date -
Apr 12, 2017
filing date -
Sep 2, 2016
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Abstract
An advanced FinFET structure is described. The structure includes a strain relaxation buffer (SRB) substrate. A set of cut silicon fins is on the SRB substrate. Each fin in the set of cut silicon fins has a vertical face at a fin end of a respective cut silicon fin. A set of cut silicon germanium fins is on the substrate. Each fin in the set of silicon germanium fins has a vertical face at a fin end of a respective cut silicon germanium fin. A set of tensile dielectric structures contact the vertical faces of the cut silicon fins to maintain tensile strain at the fin ends of the set of cut silicon fins. A set of compressive dielectric structures contact the vertical faces of respective fin ends of the cut silicon germanium fins to maintain compressive strain at the fin ends of the set of cut silicon fins.
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