Sidewall spacers for self-aligned contacts
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
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Jan 30, 2018
Issued Date -
N/A
app pub date -
Feb 29, 2016
filing date -
Feb 29, 2016
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A semiconductor device and method for fabricating such a device are presented. The semiconductor device includes a first gate electrode of a transistor, a first sidewall spacer along a sidewall of the gate pattern, a first insulating layer in contact with the first sidewall spacer and having a planarized top surface, and a second sidewall spacer formed on the planarized top surface of the first insulating layer. The second sidewall spacer may be formed over the first sidewall spacer. A width of the second sidewall spacer is equal to or greater than a width of the first sidewall spacer.
First Claim
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International Classification(s)
- 2016 Application Filing Year
- H01L Class
- 27971 Applications Filed
- 23507 Patents Issued To-Date
- 84.05 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 14 Citation Count
- H01L Class
- 87.83 % this patent is cited more than
- 7 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Jul 30, 2025 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Jul 30, 2029 |
