Sidewall spacers for self-aligned contacts
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United States of America Patent
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Jan 30, 2018
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N/A
app pub date -
Feb 29, 2016
filing date -
Feb 29, 2016
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Abstract
A semiconductor device and method for fabricating such a device are presented. The semiconductor device includes a first gate electrode of a transistor, a first sidewall spacer along a sidewall of the gate pattern, a first insulating layer in contact with the first sidewall spacer and having a planarized top surface, and a second sidewall spacer formed on the planarized top surface of the first insulating layer. The second sidewall spacer may be formed over the first sidewall spacer. A width of the second sidewall spacer is equal to or greater than a width of the first sidewall spacer.
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