Constructions comprising stacked memory arrays
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United States of America Patent
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Jan 30, 2018
Issued Date -
N/A
app pub date -
May 30, 2017
filing date -
Mar 19, 2015
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Abstract
Some embodiments include a construction having a first memory array deck and a second memory array deck over the first memory array deck. The second memory array deck differs from the first memory array deck in one or more operating characteristics, in pitch, and/or in one or more structural parameters; with the structural parameters including different materials and/or different thicknesses of materials. Some embodiments include a construction having a first series and a third series of access/sense lines extending along a first direction, and a second series of access/sense lines between the first and third series and extending along a second direction which crosses the first direction. First memory cells are between the first and second series of access/sense lines and arranged in a first memory array deck. Second memory cells are between the second and third series of access/sense lines and arranged in a second memory array deck.

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Patent Owner(s)
Patent Owner | Address | |
---|---|---|
MICRON TECHNOLOGY INC | IDAHO IDAHO |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Redaelli, Andrea | Casatenovo, IT | 157 | 1129 |
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