Semiconductor package having a source-down configured transistor die and a drain-down configured transistor die
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United States of America Patent
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Jan 30, 2018
Issued Date -
N/A
app pub date -
Apr 4, 2016
filing date -
Apr 4, 2016
priority date (Note) -
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Abstract
A semiconductor package includes a substrate, a first transistor die secured to the substrate and a second transistor die secured to the substrate. The first transistor die has a source terminal at a bottom side of the first transistor die which faces the substrate and a drain terminal and a gate terminal at a top side of the first transistor die which faces away from the substrate. The second transistor die has a drain terminal at a bottom side of the second transistor die which faces the substrate and a source terminal and a gate terminal at a top side of the second transistor die which faces away from the substrate. The package also includes a common electrical connection between the drain terminal of the first transistor die and the source terminal of the second transistor die.
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