Method of fabricating gate electrode using a treated hard mask

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United States of America Patent

PATENT NO 9881840
SERIAL NO

13157179

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Abstract

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A hard mask layer with a limited thickness is formed over a gate electrode layer. A treatment is provided on the hard mask layer to transform the hard mask layer to be more resistant to wet etching solution. A patterning is provided on the treated hard mask layer and the gate electrode to from a gate structure.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD8 LI-HSIN RD 6 HSINCHU SCIENCE PARK HSINCHU 300-78

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fang, Ziwei Hsinchu, TW 191 2939
Huang, Yu-Lien Jhubei, TW 221 4280
Tsai, Chun Hsiung Xinpu Township, TW 214 3859
Wang, Tsan-Chun Hsinchu, TW 74 1004
Wu, Chii-Ming Taipei, TW 109 1282

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