Electronic memory device and test method of such a device
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United States of America Patent
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Jan 30, 2018
Grant Date -
May 19, 2016
app pub date -
Nov 3, 2015
filing date -
Nov 17, 2014
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Abstract
The electronic memory device comprises a non-volatile memory matrix organized in rows and columns, an address decoder with address input lines for selecting a row according to a particular address given on the address input lines. Additional address mask input lines are provided, each address mask input line being assigned to an address input line, wherein an address mask input line in activated state has the effect of ignoring the assigned address input line. The method for testing said electronic memory device is performed with a significant lower number of read/write operations, since by ignoring a particular address line a plurality of write operations can be performed simultaneously.
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