Semiconductor memory device
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jan 30, 2018
Issued Date -
N/A
app pub date -
May 27, 2016
filing date -
Mar 17, 2014
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A semiconductor memory device includes a block including a plurality of string units, each including a plurality of memory cells electrically connected in series, a bad string register in which information indicating which of the string units is a bad string is stored, and a control circuit. The control circuit controls an erase operation on the memory cells, the erase operation including a first erase operation followed by a first verify operation and as needed a subsequent erase operation followed by a subsequent verify operation. During the erase operation, the control circuit skips a verify operation for a string unit if the information in the bad string register indicates the string unit is a bad string.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully