Dynamically addressable master-slave system and method for dynamically addressing slave units
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United States of America Patent
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Jan 30, 2018
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Aug 31, 2015
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Oct 10, 2014
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Abstract
A master-slave system includes a master unit having a digital output for providing a signal or a serial signal sequence of signals, and at least two slave units. Each of the slave units includes at least one digital serial memory having a size of one bit, and each slave unit includes an input and an output. The slave units are serially connected to one another via the inputs and the outputs via a signal line (5). The output of a first slave unit is connected via the signal line to the digital output of the master unit. The master slave system is configured so that a signal supplied by the digital output is detected at the input of the slave unit, in order to raise the address of the corresponding slave unit in each case by the value “1”, to store the signal change in the memory and to output a signal corresponding to the content of the memory at the output of the memory.
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