Memory system and information processing system
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United States of America Patent
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Jan 30, 2018
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N/A
app pub date -
Feb 5, 2016
filing date -
Sep 4, 2015
priority date (Note) -
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Abstract
According to one embodiment, a memory system includes a nonvolatile memory, a device controller, and a tag memory. The device controller stores a part of a logical-to-physical address translation table (L2P table) stored in the nonvolatile memory in a memory of a host as a cache. The tag memory includes a plurality of entries associated with a plurality of cache lines of the cache. Each entry includes a tag indicating which area of the L2P table is stored in a corresponding cache line, and a plurality of bitmap flags indicating whether a plurality of sub-lines included in the corresponding cache line are valid or not.
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