Flip-flop circuit with data-driven clock
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United States of America Patent
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Jan 23, 2018
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N/A
app pub date -
Aug 29, 2016
filing date -
Nov 2, 2015
priority date (Note) -
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Abstract
A flip-flop circuit includes a D flip-flop and a gating controller. The D flip-flop generates an output signal according to a data signal and a gated clock signal. The gating controller receives an original clock signal. The gating controller further compares the output signal with the data signal. If the output signal is the same as the data signal, the gating controller will maintain the gated clock signal at a constant logic level. If the output signal is different from the data signal, the gating controller will use the original clock signal as the gated clock signal.
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