Lattice matched and strain compensated single-crystal compound for gate dielectric
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United States of America Patent
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Jan 23, 2018
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app pub date -
Jun 30, 2016
filing date -
Jun 30, 2016
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Abstract
A transistor device includes a source region, a drain region and a III-V channel material disposed between the source and drain region. A gate dielectric layer is epitaxially grown on the III-V channel material. The gate dielectric layer includes a (X)Se compound, wherein X includes one or more of Zn, Cd and/or Mg. A gate conductor is formed on the gate dielectric layer.
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