Surround gate transistor device and contact structure for same

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United States of America Patent

PATENT NO 9876087
SERIAL NO

15337227

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Abstract

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A semiconductor device includes a fin-shaped semiconductor layer and a pillar-shaped semiconductor layer. A diffusion layer resides in an upper portion of the fin-shaped semiconductor layer. A metal contact electrode is around the pillar-shaped semiconductor layer and a metal contact line is connected thereto. A fourth contact surrounds an upper sidewall of the pillar-shaped semiconductor layer and is connected to the metal contact electrode.

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Patent Owner(s)

Patent OwnerAddress
UNISANTIS ELECTRONICS SINGAPORE PTE LTDSINGAPORE 179098

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Masuoka, Fujio Tokyo, JP 412 6771
Nakamura, Hiroki Tokyo, JP 382 4527

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