Method for local isolation between transistors produced on an SOI substrate, in particular an FDSOI substrate, and corresponding integrated circuit

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United States of America Patent

PATENT NO 9876076
SERIAL NO

14956594

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Abstract

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An integrated circuit may include an SOI substrate having a buried insulating layer, and a semiconductor film above the buried insulating layer. The semiconductor film may have first patterns in a first zone defining gate regions of first MOS transistors and also first dummy gate regions. The first zone may include two domains having a space therebetween, and the space may be filled by at least one insulating material and be situated between two dummy gate regions above a region of the supporting substrate without any insulating trench.

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Patent Owner(s)

Patent OwnerAddress
STMICROELECTRONICS (CROLLES 2) SAS38920 CROLLES

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Perrin, Emmanuel Bernin, FR 11 43

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