Semiconductor memory device and method of manufacturing the same
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United States of America Patent
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Jan 23, 2018
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N/A
app pub date -
Sep 15, 2016
filing date -
Jan 11, 2016
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Abstract
The memory string comprises: a plurality of control gate electrodes stacked on the substrate and extending in a first direction and a second direction parallel to the substrate; a semiconductor layer that has one end thereof connected to the substrate, has as its longitudinal direction a third direction perpendicular to the substrate, and faces the plurality of control gate electrodes; and a charge accumulation layer positioned between the control gate electrode and the semiconductor layer. The contact includes, in the third direction, a first portion, a second portion which is more to a substrate side than is the first portion, and a third portion which is more to the substrate side than is the second portion. A width of the second portion is larger than a width of the first portion, and larger than a width of the third portion.
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