Germanium-based quantum well devices
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United States of America Patent
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Jan 23, 2018
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app pub date -
Sep 20, 2016
filing date -
Dec 30, 2009
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Abstract
A quantum well transistor has a germanium quantum well channel region. A silicon-containing etch stop layer provides easy placement of a gate dielectric close to the channel. A group III-V barrier layer adds strain to the channel. Graded silicon germanium layers above and below the channel region improve performance. Multiple gate dielectric materials allow use of a high-k value gate dielectric.
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