Wiring board, semiconductor device, and manufacturing methods thereof
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jan 23, 2018
Issued Date -
N/A
app pub date -
Aug 2, 2016
filing date -
Jun 29, 2010
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
It is an object to reduce defective conduction in a wiring board or a semiconductor device whose integration degree is increased. It is another object to manufacture a highly reliable wiring board or semiconductor device with high yield. In a wiring board or a semiconductor device having a multilayer wiring structure, a conductive layer having a curved surface is used in connection between conductive layers used for the wirings. The top of a conductive layer in a lower layer exposed by removal of an insulating layer therearound has a curved surface, so that coverage of the conductive layer in the lower layer with a conductive layer in an upper layer stacked thereover can be favorable. A conductive layer is etched using a resist mask having a curved surface, so that a conductive layer having a curved surface is formed.
First Claim
Other Claims data not available
Family
International Classification(s)
- 2016 Application Filing Year
- H01L Class
- 27971 Applications Filed
- 23507 Patents Issued To-Date
- 84.05 % Issued To-Date
Cited Art Landscape
Patent Citation Ranking
- 1 Citation Count
- H01L Class
- 23.71 % this patent is cited more than
- 7 Age
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Jul 23, 2025 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Jul 23, 2029 |
