Switched interface stacked-die memory architecture

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United States of America Patent

PATENT NO 9875814
SERIAL NO

15155848

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Abstract

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Systems and methods disclosed herein include those that may receive a memory request including a requested memory address and may send the memory request directly to an address decoder associated with a stacked-die memory vault without knowing whether a repair address is required. If a subsequent analysis of the memory request shows that a repair address is required, an in-process decode of the requested memory address can be halted and decoding of the repair address initiated.

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Patent Owner(s)

Patent OwnerAddress
MICRON TECHNOLOGY INCIDAHO IDAHO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jeddeloh, Joe M Shoreview, US 75 1694
LaBerge, Paul A Shoreview, US 117 2983

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