Semiconductor memory apparatus converting serial type data into parallel type data in response to pipe control signals and pipe control signals during a training operation
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United States of America Patent
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Jan 23, 2018
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N/A
app pub date -
Sep 17, 2014
filing date -
May 13, 2014
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Abstract
A semiconductor memory apparatus may include a data conversion control block configured to control the number of pipe input control signals and the number of pipe output control signals which are enabled, in response to a training control signal. The semiconductor memory apparatus may also include a data conversion block configured to receive parallel data and output serial data, in response to the pipe input control signals and the pipe output control signals.
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