Semiconductor device and operating method thereof
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United States of America Patent
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Jan 23, 2018
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app pub date -
Sep 24, 2015
filing date -
May 19, 2015
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Abstract
The semiconductor memory device includes: a memory unit including a plurality of memory blocks; a decoder suitable for storing bad block information about the plurality of memory blocks, and outputting the bad block information in response to an address signal; and a control logic suitable for controlling the memory unit and the decoder to update a status register (SR) code in response to the bad block information when the semiconductor memory device at a ready state enters a busy state, and to perform a general operation according to the updated SR code and a command.
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