Memory system that controls power state of buffer memory

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United States of America Patent

PATENT NO 9875051
SERIAL NO

15049756

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Abstract

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A memory device includes a nonvolatile memory unit, a volatile memory unit including first and second memory modules, and a controller configured to store data from the nonvolatile memory unit in the volatile memory unit before the data are transferred to a host. While the controller stores the data in the first memory module, the first memory module is in a first power state and the second memory module is in a second power state. The first power state corresponds to a high power consumption state and the second power state corresponds to a low power consumption state.

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Patent Owner(s)

Patent OwnerAddress
KIOXIA CORPORATION1-21 SHIBAURA 3-CHOME MINATO-KU TOKYO 108-0023

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Suzuki, Hirotaka Kawasaki Kanagawa, JP 94 974

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