System and process for fabricating semiconductor packages

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United States of America Patent

PATENT NO 9874820
SERIAL NO

14887111

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Abstract

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A method of processing semiconductor chips includes measuring locations of semiconductor dies placed on a carrier with a scanner to generate die location information. The method includes applying a dielectric layer over the semiconductor dies and communicating the die location information to a laser assembly. The method includes aligning the laser assembly with the carrier and laser structuring the dielectric layer with the laser assembly based on the die location information generated by the scanner.

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Patent Owner(s)

Patent OwnerAddress
TAHOE RESEARCH LTDBLANCHARDSTOWN CORPORATE PARK 2 PLAZA 255 SUITE 2A DUBLIN D15 YH6H

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Meyer, Thorsten Regensburg, DE 309 5595

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