Counter, counting method, ad converter, solid-state imaging device, and electronic device
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United States of America Patent
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Jan 16, 2018
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app pub date -
Apr 20, 2015
filing date -
Jun 20, 2012
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Abstract
A counter configured to perform counting at both edges of an input clock to output an additional value or a subtraction value for a previous count value and a next count value includes a first latch circuit that latches the input clock, a second latch circuit that latches an output from the first latch circuit, a holding section that holds data of the 0th bit of a count value, and a correction section that performs count correction on data of the first and subsequent bits of the count value on the basis of an output of the second latch circuit.
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