Counter, counting method, ad converter, solid-state imaging device, and electronic device
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
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Jan 16, 2018
Issued Date -
N/A
app pub date -
Apr 20, 2015
filing date -
Jun 20, 2012
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A counter configured to perform counting at both edges of an input clock to output an additional value or a subtraction value for a previous count value and a next count value includes a first latch circuit that latches the input clock, a second latch circuit that latches an output from the first latch circuit, a holding section that holds data of the 0th bit of a count value, and a correction section that performs count correction on data of the first and subsequent bits of the count value on the basis of an output of the second latch circuit.
First Claim
all claims..Other Claims data not available
Family

- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
- SONY CORPORATION
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Hisamatsu, Yasuaki | Fukuoka, JP | 26 | 318 |
# of filed Patents : 26 Total Citations : 318 |
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Patent Citation Ranking
- 1 Citation Count
- H03K Class
- 21.67 % this patent is cited more than
- 7 Age
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