Heterogeneous compression architecture for optimized compression ratio
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United States of America Patent
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Jan 16, 2018
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app pub date -
Dec 29, 2016
filing date -
Sep 25, 2015
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Abstract
A processing device includes an accelerator circuit to identify a byte in a byte stream, determine whether a first byte string starting from a first byte position of the byte matches a second byte string starting from a second byte position, responsive to determining that the first byte string matches the second byte string, generate a token comprising a first symbol encoding a length of the first byte string and a second symbol encoding a byte distance between the first byte position and the second byte position, and responsive to determining that the first byte string does not match another byte string, generate the token comprising the first symbol comprising the byte and a second symbol encoding a determined value.
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