Digital to-analog converters with non-binary weighted cell array
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United States of America Patent
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Jan 16, 2018
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N/A
app pub date -
Mar 2, 2017
filing date -
Sep 9, 2016
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Abstract
According to at least one aspect, a digital-to-analog converter (DAC) circuit configured to receive a digital signal and provide an analog signal is provided. The DAC circuit includes a first circuit configured to receive a first portion of the digital signal and generate a first output voltage at a level selected from a first plurality of levels where at least two adjacent voltage levels have a first potential difference. The DAC circuit further includes a second circuit configured to receive a second portion of the digital signal and generate a second output voltage at a level selected from a second plurality of levels where at least two adjacent voltage levels have a second potential difference and the second circuit includes a compensation circuit configured to adjust the second potential difference such that the second potential difference is an integer multiple of the first potential difference.
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