Method of manufacturing a termination arrangement for a vertical MOSFET

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United States of America Patent

PATENT NO 9871119
SERIAL NO

14552381

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Abstract

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Representative implementations of devices and techniques provide a termination arrangement for a transistor structure. The periphery of a transistor structure may include a recessed area having features arranged to improve performance of the transistor at or near breakdown.

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Patent Owner(s)

Patent OwnerAddress
INFINEON TECHNOLOGIES AUSTRIA AG2 SIEMENS STREET VILLACH AUSTRIA VILLACH CARINTHIA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Wood, Andrew St. Jakob im Rosental, AT 60 669
Zundel, Markus Egmating, DE 184 1595

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