Field-effect transistors with a non-relaxed strained channel
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United States of America Patent
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Jan 16, 2018
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app pub date -
Mar 3, 2016
filing date -
Mar 3, 2016
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Abstract
Device structures for a field-effect transistor and methods of forming such device structures using a device layer of a silicon-on-insulator substrate. A channel and an isolation region are formed in the device layer. The channel is located beneath a gate structure is formed on the device layer and is comprised of a semiconductor material under strain. A portion of the device layer is located between the first isolation region and the channel. The portion of the device layer is under a strain that is less than the strain in the semiconductor material of the channel.
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