SRAM circuits with aligned gate electrodes
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United States of America Patent
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Jan 16, 2018
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N/A
app pub date -
Jul 5, 2016
filing date -
Feb 24, 2016
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Abstract
A device includes a Static Random Access Memory (SRAM) array, and an SRAM cell edge region abutting the SRAM array. The SRAM array and the SRAM cell edge region in combination include first gate electrodes having a uniform pitch. A word line driver abuts the SRAM cell edge region. The word line driver includes second gate electrodes, and the first gate electrodes have lengthwise directions aligned to lengthwise directions of respective ones of the second gate electrodes.
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