Multi-level chip interconnect

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United States of America Patent

PATENT NO 9871017
SERIAL NO

14986727

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Abstract

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Representative implementations of devices and techniques provide optimized electrical performance of interconnectivity components of multi-layer integrated circuits (IC) such as chip dice, for example. Different layers of the multi-layer IC include contact terminals that may be used to connect to circuits, systems, and carriers external to the IC.

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Patent Owner(s)

Patent OwnerAddress
INFINEON TECHNOLOGIES AGCAMPBELL 1-15 NAUBIBERG GERMANY NEUBIBERG BAVARIA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jacobs, Tobias Dresden, DE 25 61
Ossimitz, Peter Munich, DE 19 121

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