Lead frame, method for manufacturing lead frame, semiconductor device, and method for manufacturing semiconductor device
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United States of America Patent
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Jan 16, 2018
Issued Date -
N/A
app pub date -
Nov 29, 2016
filing date -
Apr 18, 2013
priority date (Note) -
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Abstract
A lead frame includes a die pad and a plurality of lead portions each including an internal terminal and an external terminal. The external terminals of the plurality of lead portions are arranged in an alternately staggered form such that the respective external terminals of a pair of lead portions adjacent to each other are alternatively located on an inside or an outside. A lead portion has an inside region located on the inside of a first external terminal, an outside region located on the outside of the first external terminal, and an external terminal region having the first external terminal. The inside region and the outside region are each formed thin by means of half etching. A maximum thickness of the outside region is larger than a maximum thickness of the inside region.
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