Plurality of seals for integrated device package
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United States of America Patent
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Jan 16, 2018
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N/A
app pub date -
Mar 10, 2016
filing date -
Mar 10, 2016
priority date (Note) -
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Abstract
Semiconductor packages and methods of manufacturing semiconductor packages are described herein. In certain embodiments, the semiconductor package includes a substrate, a wall attached to the substrate, a first adhesive layer disposed between a bottom surface of the wall and a top surface of the substrate, and a second adhesive layer disposed around an outer perimeter of the first adhesive layer, the second adhesive layer disposed adjacent and contacting the wall, the second adhesive layer different from the first adhesive layer, wherein at least one of the first adhesive layer and the second adhesive layer connects the wall to electrical ground.
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