Forming insulator fin structure in isolation region to support gate structures
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United States of America Patent
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Jan 16, 2018
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app pub date -
Jun 9, 2016
filing date -
Jun 9, 2016
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Abstract
A method for forming the semiconductor device that includes forming a plurality of composite fin structures across a semiconductor substrate including an active device region and an isolation region. The composite fin structures may include a semiconductor portion over the active device region and a dielectric portion over the isolation region. A gate structure can be formed on the channel region of the fin structures that are present on the active regions of the substrate, and the gate structure is also formed on the dielectric fin structures on the isolation regions of the substrate. Epitaxial source and drain regions are formed on source and drain portions of the fin structures present on the active region, wherein the dielectric fin structures support the gate structure over the isolation regions.
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