SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
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United States of America Patent
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Jan 16, 2018
Grant Date -
Feb 1, 2018
app pub date -
Jul 28, 2016
filing date -
Jul 28, 2016
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Abstract
A method of manufacturing a source structure for a p-type metal-oxide-semiconductor (PMOS) field effect transistor (FET) is provided. In the method, a first epitaxial layer comprising Si1-xGex is formed on a source region of an FET, a second epitaxial layer comprising Si1-yGey is formed on the first epitaxial layer, a third epitaxial layer comprising Si1-zGez is formed on the second epitaxial layer. Z is smaller than y.
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