Structure and method for a SRAM circuit
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United States of America Patent
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Jan 16, 2018
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Nov 28, 2016
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Mar 10, 2010
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Abstract
The present disclosure provides an integrated circuit formed in a semiconductor substrate. The integrated circuit includes a first static random access memory (SRAM) cell having a first cell size; and a second SRAM cell having a second cell size greater than the first cell size. The first SRAM cell includes first n-type field effect transistors (nFETs) each having a first gate stack. The second SRAM cell includes second nFETs each having a second gate stack different from the first gate stack.
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