Data storage device and flash memory control method
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United States of America Patent
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Jan 16, 2018
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N/A
app pub date -
Aug 28, 2015
filing date -
Nov 3, 2014
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Abstract
A flash memory control technology with high reliability. In a power recovery process, a microcontroller is configured to duplicate a last write page of a run-time write block of a flash memory and thereby generate a duplicated page in the run-time write block. The microcontroller is further configured use the mapping information accessed from the duplicated page in rebuilding a physical-to-logical address mapping table rather than the mapping information accessed from the last write page. The microcontroller is configured to maintain the physical-to-logical address mapping table on a random access memory for the run-time write block and is further configured to use the physical-to-logical address mapping table to update a logical-to-physical address mapping table maintained in the flash memory.
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