High speed controllable load
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United States of America Patent
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Jan 16, 2018
Issued Date -
N/A
app pub date -
Dec 19, 2016
filing date -
Jun 15, 2011
priority date (Note) -
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Abstract
A high speed controllable load uses a voltage waveform synthesizer and a driver circuit to dynamically control an electronically variable load to generate a current though an arc fault circuit interrupter (AFCI) device under test. Sensors may be used to monitor a source voltage and the output current to generate an arbitrary waveform have a range of voltage and current phase shifts. An optical isolation circuit allows separation of grounds between a control stage and the AFCI device under test.
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