Apparatus and method for single antenna interference cancellation (SAIC) enhancement
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United States of America Patent
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Jan 9, 2018
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Dec 16, 2016
filing date -
Oct 21, 2016
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Abstract
An interference cancellation (IC) processor, a method, a method of manufacturing a semiconductor device, and a method of constructing an integrated circuit are provided. The IC processor includes a plurality of mono interference cancellation (MIC) filter estimation processors, each including a different equalizer offset k0 and an input for receiving a de-rotated signal, and providing an effective channel hres,i and an estimated filter pi; a plurality of filters, each including an input connected to the plurality of MIC filter estimation processors, and an output; a plurality of multipliers, each including a first input connected to the plurality of filters, a second input for receiving a weight, and an output; and a branch combiner including a plurality of inputs connected to the plurality of multipliers, a first output for providing a combined residual channel Hres, and a second output for providing a projected output y of the de-rotated signal.
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