Incremental analog to digital converter with efficient residue conversion
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United States of America Patent
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Jan 9, 2018
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app pub date -
Apr 27, 2017
filing date -
Apr 27, 2017
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Abstract
An incremental analog to digital converter for digitizing an analog voltage including an Mth order delta sigma modulator, an Mth order digital decimation filter, a controller, and a digital combiner. The controller operates the modulator to convert the analog voltage into multiple digital samples, and operates the digital decimation filter to convert the digital samples into a preliminary digital output value. The controller further operates the delta sigma modulator during a residue phase for M clock cycles in which the modulator provides a digital residue value. The digital combiner combines the preliminary digital output value with the digital residue value to provide an initial digital output value. For an Mth order system, only M additional cycles are needed to extract the residual value to increase the resolution of the digital output by an amount based on the resolution of a modulator quantizer.
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